More Features

4-to-1 Mux with the Ternary Operator

Build a 4-to-1 multiplexer using nested ternary (conditional) operators instead of a case statement.

Parity Generator (reduction operators)

Generate an even-parity bit for an 8-bit bus using the unary XOR reduction operator.

Parameterized XOR Ring (generate)

Use a generate-for loop and a WIDTH parameter to build an N-bit ring of XOR gates that scales to any bus width.

Wide Reduction Gates

Reduce a 32-bit vector to OR, AND, and parity results.

100-Bit Ripple-Carry Adder with Carry Outputs

Ripple a carry-in through 100 full-adder stages and expose each stage's carry output.

Generated BCD Adder

Add two packed decimal digits and include decimal carry out.

100-Digit BCD Ripple-Carry Adder

Add two 100-digit packed BCD values using a generated chain of decimal digit adders.

100-Bit Vector Reversal

Reverse bit order across a 100-bit vector.

255-Bit Population Count

Count the number of asserted bits in a 255-bit input vector.