Writing Testbenches

Exhaustively Test a Full Adder

Write a self-checking testbench that exhaustively verifies every input combination of a 1-bit full adder.

Verify a Counter's Sequence

Write a self-checking testbench that drives a 4-bit counter for many cycles and verifies it increments and wraps correctly.

Verify an FSM's Output Sequence

Write a self-checking testbench that streams a bit sequence into a '101' pattern-detector FSM and verifies its Moore output at every cycle.

Verify a Shift Register

Write a self-checking testbench that shifts a known bit pattern into a 4-bit shift register and verifies its contents after every shift.

Clock

Create a periodic timing pulse that can serve as a simple clock enable.

Testbench1

Implement a small DUT whose complete two-input truth table can be checked.

AND Gate

Implement a DUT that can be checked against the AND truth table.

Testbench2

Implement a sequential DUT whose reset, enable, and hold behavior can be verified.

T Flip-Flop

Build a T flip-flop with synchronous reset and toggle control.